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A whole byte of SRAM with display LEDs and (planned) input inverters to simplify interface. SRAM operation typically requires 2 lines per bit, both set high for read followed by sensing the difference caused by which line is low, and each set opposite the other for writing. I put in a sense transistor with a Read Enable line to pull Hi/Lo from Q without the Pulse-High/Compare process. I'd like to make the Write process as simple on the interface side, so the 'user' won't have to provide both a high and a low value just to set a bit. That should leave this 8bit byte board with 20 interface lines, 8 read, 8 write, Read Enable, Write Enable, Vdd and Ground.